Ethernet 1588 PTP Time of Day Clock IP Driver for Hard Processor System¶
Last updated: July 11, 2024
Upstream Status: Not Upstreamed
Devices supported: Agilex 7
Introduction¶
The driver for the Ethernet 1588 PTP Time of Day Clock FPGA IP is used in the 1588 PTP Design examples provided by Altera. The Time of Day Clock FPGA IP is exposed as a PTP Hardware Clock (PHC) device to the Linux PTP stack to synchronize the system clock to its ToD information using phc2sys utility in the Linux PTP stack.
Time of Day Clock FPGA IP¶
The Time-of-day (TOD) Clock streams 96-bit and 64-bit time-of-day to one or more time stamping units in an IEEE 1588v2 solution. For information regarding this soft IP core, please refer to the Ethernet Design Example Components User Guide.
Driver Sources¶
The source code for this driver can be found at https://github.com/altera-opensource/linux-socfpga/blob/socfpga-5.15.90-lts-ftile-1588ptp/drivers/net/ethernet/altera/intel_fpga_tod.c.
Driver Capabilities¶
- Registers PTP clock driver to kernel
- Calculates the ToD of clock offset adjustments
Kernel Configurations¶
CONFIG_INTEL_FPGA_TOD
Device Tree¶
Example Device tree location to configure the TOD:
Known Issues¶
None known
Example Designs¶
This driver is used in the Agilex 7 SoC F-Tile Design Example for 25GbE and 10GbE with IEEE1588PTP.
Notices & Disclaimers¶
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Created: May 25, 2024