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General Purpose I/O Driver for Hard Processor System

Last updated: November 01, 2024

Upstream Status: Upstreamed

Devices supported: Agilex 5, Agilex 7

Introduction

The Hard Processor System (HPS) provides two General-Purpose I/O (GPIO) interface modules.

The GPIO interface supports Digital debounce, configurable interrupt mode, and has up to 48 dedicated I/O pins. For more information please refer to the Agilex 5 Hard Processor System Technical Reference Manual.

The figure below shows a block diagram of the GPIO interface:

a5_gpio_block_diagram

Driver Sources

The source code for this driver can be found at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpio/gpio-dwapb.c.

Driver Capabilities

  • GPIO muxed between I2C and SPI.
  • Interrupt propagation between the device and logic on board.
  • Control other circuitry on board.
  • Digital debounce.
  • Configurable interrupt mode.

Kernel Configurations

CONFIG_GPIO_DWAPB

gpio_kconfig

Device Tree

Example Device tree location:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi

gpio_device_tree

Known Issues

None known

Notices & Disclaimers

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Last update: November 1, 2024
Created: May 25, 2024