Zarlink Clock Synchronizer Driver for Hard Processor System¶
Last updated: February 12, 2025
Upstream Status: Not Upstreamed
Devices supported: Agilex 7
Introduction¶
The Microchip® Zarlink ZL30733 3-Channel SyncE & 1588 Network Synchronizer takes charge of frequency synchronization, monitors reference clock quality, manages reference clock switching, and provides holdover functionality for SyncE and PTP1588 support. It has support for multiple reference clocks and can be used to generate the outputs. The device is constantly monitoring the quality of the reference clocks and it switches to an alternative clock source when the measured period of the current reference signal is incorrect, or if it has excessive jitter.
I2C based zl30733
graph TD;
A[intel_freq_control.c]-->B[intel_freq_ctrl_common_i2c.c];
A[intel_freq_control.c]-->C[intel_freq_ctrl_zl30733_i2c.c];SPI based zl30793
graph TD;
A[intel_freq_control.c]-->B[intel_freq_ctrl_common_spi.c];
A[intel_freq_control.c]-->C[intel_freq_ctrl_zl30793_spi.c];Zarlink chip information¶
For Microchip® Zarlink ZL30733 documentation please refer to https://www.microchip.com/en-us/product/zl30733 and https://www.microchip.com/en-us/product/zl30793.
Driver Sources¶
The source code for this driver can be found at:
- General Frequency control driver
- I2C based ZL30733 support
- I2C based common api for frequency control
- SPI based zl30793 support
- SPI based common api for frequency control
Driver Capabilities¶
- Support frequency synchronization, monitor reference clock quality, manage reference clock switching.
- Provides holdover functionality for SyncE and PTP1588 support.
Device Tree¶
Example Device tree location:
Known Issues¶
None known
Example Designs¶
Zarlink driver is used in the Agilex 7 SoC F-Tile Design Example for 25/10 GbE with IEEE1588PTP.
Notices & Disclaimers¶
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Created: May 25, 2024