Baremetal Drivers¶
Overview¶
This page presents the pre-release of the Agilex 5 baremetal drivers. The purpose of the drivers is to provide developers with access to the low-level functionality of the HPS IP blocks, including the ability to access IP registers. The drivers are provided through the following git repository: https://github.com/altera-fpga/baremetal-drivers and are released under the MIT License.
Resources:
Majority of validation for this pre-release was done on the Intel Simics Simulator for Intel FPGAs.
Demo¶
The following demo is provided:
Driver List¶
| Name | Documentation | Source |
|---|---|---|
| Clock Manager | clkmgr | clkmgr |
| Combophy for SDMMC | combophy | combophy |
| DMA | dma | dma |
| GIC | gic | gic |
| General Purpose IO | gpio | gpio |
| HPS Mailbox to SDM | mailbox | mailbox |
| I2C | i2c | i2c |
| I3C | i3c | i3c |
| MMU | mmu | mmu |
| Reset Manager | rstmgr | rstmgr |
| SDMMC | sdmmc | sdmmc |
| SPI | spi | spi |
| System Manager | sysmgr | sysmgr |
| Timers | timer | timer |
| UART | uart | uart |
| Watchdog Timers | watchdog | watchdog |
Last update:
December 6, 2024
Created: May 25, 2024
Created: May 25, 2024