4Kp60 Multi-Sensor HDR Camera Solution System Example Design for Agilex™ 5 Devices - RBF Modular Design Toolkit (MDT) Flow¶

Pre-requisites¶

Software Requirements to build¶

Linux OS installed.
72 GB free storage (~2GB for Quartus® Build and ~70GB for YOCTO/KAS build).
Python/PIP/KAS for Yocto Build (or a suitable container) see KAS.
Altera® Quartus® Prime Pro Edition version 25.1 Linux.
- Altera® Quartus® Agilex™ 5 Support.
FPGA NiosV Open-Source Tools 25.1 (installed with Quartus® Prime).

License Requirements to build¶

Full licenses:
- VVP IP Suite, VVP Tone Mapping Operator (TMO) IP, VVP Warp IP, and 3D LUT IP.
Free licenses (must be downloaded and installed):
- MIPI DPHY IP and MIPI CSI-2 IP.
- Nios® V Processor.

Hardware Requirements¶

Agilex™ 5 FPGA E-Series 065B Modular Development Kit.

Agilex™ 5 FPGA E-Series 065B Modular Development Kit

1 or 2 Framos FSM:GO IMX678C Camera Modules, with:
- Wide 110deg HFOV Lens, or
- Medium 100deg HFOV Lens, or
- Narrow 54deg HFOV Lens.
Mount/Tripod
- Framos Tripod Mount Adapter.
- Tripod.
A Framos cable for PixelMate MIPI-CSI-2 for each Camera Module:
- 150mm flex-cable, or
- 300mm micro-coax cable.
Minimum 8GB U3 microSD Card.
DP Cable or HDMI Cable (with 4Kp60 Converter Dongle).
USB Micro B JTAG Cable (for JTAG programming).
USB Micro B Serial Cable (for HPS terminal connection).
RJ45 Ethernet Cable (HPS network connection).
Monitor/TV (recommend 4Kp60 capable).

Software Requirements to run¶

Host PC with:
- 8 GB of RAM (less if not rebuilding binaries).
- Linux/Windows OS installed.
- Serial terminal (such as GtkTerm or Minicom on Linux, and TeraTerm or PuTTY on Windows).
  - FTDI FT232R USB UART drivers (for a Windows host).
- Tool to write images for removable USB drives or microSD cards such as Win32DiskImager on Windows or "dd" command on Linux.
- Altera® Quartus® Prime Pro Edition version 25.1 Programmer and Tools.
- Ethernet connection (either direct from Host PC to development board, or via a switch or router).
  - Note, you may need to disconnected/disabled VPN if it is installed on the Host PC.
- Web browser.

Getting Started - build and run RBF, JIC, and microSD Card Image¶

Follow the instructions provided in this section to build the 4K Multi-Sensor HDR Camera Solution System Example Design on the Agilex™ 5 FPGA E-Series 065B Modular Development Kit. You will build RBF and JIC files using the Modular Development Toolkit, and a microSD Card image using KAS and Yocto (suitable for use with fully licensed IP cores).

Reference pre-built Binaries¶

You can use the pre-built binaries for reference:

Boot Source	Link
Pre-built microSD Card Image for RBF MDT Flow	hps-first-vvp-isp-demo-image-agilex5_mk_a5e065bb32aes1.wic.gz
Pre-built HPS First `.rbf` file	top.core.rbf
Pre-built `.jic` file	top.core.jic

HW Compilation¶

Use the RBF Modular Design Toolkit (MDT) Flow to create and build the FPGA Design.

SW Compilation¶

Use the Create microSD card image (.wic.gz) using YOCTO/KAS flow to create the microSD card image.

Note

use KAS_MACHINE=agilex5_mk_a5e065bb32aes1 and kas/agilex_camera.yml configuration

You can copy and rename your generated .rbf to sw/meta-vvp-isp-demo/recipes-bsp/u-boot/files/top.core.rbf to build it into the microSD Card image during the YOCTO flow.
There are alternative methods to get your .rbf onto the microSD Card.

Programming¶

Setting Up your Modular Development Board¶

Warning

Handle ESD-sensitive equipment (boards, microSD Cards, Camera sensors, etc.) only when properly grounded and at an ESD-safe workstation

Configure the board switches as shown:

Modular Development Board - Default Switch Positions

Main switch configurations used by the Camera Solution System Example Design

JTAG Mode: SOM S4=OFF:OFF, or
ASx4 (QSPI) Mode: SOM S4=ON:ON

Connect micro USB cable between the carrier board (J35) and the Host PC. This will be used for JTAG communication. Look at what ports are enumerated on your Host computer. There should be a series of four.
Connect micro USB cable between the SOM board (J2, HSP_UART) and the Host PC. This will be used for HPS UART communication. Look at what ports are enumerated on your Host computer. There should be a series of four. Use the 3^rd one in the list as the HPS serial port.
Connect an RJ45 cable between the ethernet port on the SOM board (J6, ETH 1G HPS) and make sure it is on the same network as your Host PC. You can check the eth0 IP address after boot using the Linux ip a command.

Board Connections

Burn the microSD Card Image¶

Either use your own or download the pre-built <name>.wic.gz image.
Extract <name>.wic image from the zip file
- On Linux, use the dd utility:
```
tar -xzf `<name>.wic.gz`
```
- On Windows, use the 7-Zip program (or similar):
  - Right click <name>.wic.gz file, and select "Extract All..."

Write the <name>.wic image to the microSD card using a USB writer:
- On Linux, use the dd utility:
```
# Determine the device associated with the SD card on the host computer.
cat /proc/partitions
# This will return for example /dev/sd<x>
# Use dd to write the image in the corresponding device
sudo dd if=<name>.wic of=/dev/sd<x> bs=1M
# Flush the changes to the microSD card
sync
```
- On Windows, use the Win32DiskImager program (or similar):
  - Click browse icon and select "*.*" filter:
  Navigate to your download and select <name>.wic in the "Disk Imager" tool
  - Write the image (note your Device may be different to that shown):
  Write the microSD Card using the "Disk Imager" tool

Turn off the board and insert the microSD card in the microSD card slot located on the SOM board.

Program the QSPI Flash Memory¶

This should only need to be done once. To program the QSPI flash memory:

Power down the board. Set MSEL=JTAG by setting the S4 dip switch on the SOM to OFF-OFF.
- This prevents any bootloader from starting and leaves the JTAG chain in a default state.

Power up the board.

Either use your own or download the pre-built JIC image, and write it to the QSPI Flash memory using either the command:
```
quartus_pgm -c 1 -m jtag -o "pvi;top.core.jic" 
```

or, optionally using the Quartus® Programmer GUI:
- Launch the Quartus® Programmer and Configure the "Hardware Setup..." settings as following:

Programmer - GUI Hardware Settings

Click "Auto Detect", select the device A5EC065BB32AR0, and press "Change File.."

Programmer - After "Auto Detect"

Select your top.core.jic file. The MT25QU02G device should be shown (see below). Check the "Program/Configure" box and press the "Start" button. Wait until the programming has been completed (which can take several minutes).

Programming the QSPI Flash with the JIC file

Power down the board. Set MSEL=ASX4 (QSPI) by setting the S4 dip switch on the SOM to ON-ON.
- This starts the HPS bootloader and FPGA configuration from the microSD Card after power up.

Running¶

Board and Host PC Setup¶

Warning

Handle ESD-sensitive equipment (boards, microSD Cards, Camera sensors, etc.) only when properly grounded and at an ESD-safe workstation

Make the required connections between the Host PC and the Modular Development board as shown in the following diagram:

Development Kit and Host PC Connection diagram

Connect the Framos cable(s) between the Framos Camera Module(s) and the Modular Development board taking care to align the cable(s) correctly with the connectors (pin 1 to pin 1). For a single camera module, either MIPI connector can be used.

Board MIPI connections

Board MIPI and Ribbon Cable

Camera and Ribbon Cable

Board with Connections

Connect the Modular Development carrier board DisplayPort Tx connector to the Monitor using a suitable cable (and dongle if you are using HDMI).

Connect Browser to UI¶

Power up the board (if not already powered) and set up the serial terminal emulator (minicom, teraterm, putty, etc.):
- Select the correct COMx port. (The Modular Development board presents 4 serial COM ports over a single connection and the Linux system uses the 3^rd port in order). Set the port configuration as follows:
  - 115200 baud rate, 8 Data bits, 1 Stop bit, CRC and Hardware flow control disabled.
The Linux OS will boot and the 4K Multi-Sensor HDR Camera Solution System Example Design Application should run automatically.
A few seconds after Linux boots, the application will detect the attached Monitor and the ISP processed output will be displayed using the best supported format.
Take note of the board's IP address.
- The board's IP address can also be found using the terminal by logging in as root (no password required) and querying the Ethernet controller:
```
root
ifconfig
```
- eth0 provides the IPv4 or IPv6 address to connect to.

Example ifconfig output for if network provides DHCP

Example ifconfig output for if no DHCP support, or direct connection

Connect your web browser to the boards IP address so you can interact with the 4K Multi-Sensor HDR Camera Solution System Example Design using the GUI.
- To connect using IPv6 for the examples above you would use http://[fe80::a8bb:ccff:fe55:6688] (note the square brackets)
- To connect using IPv4 for the DHCP example above you would use http://192.168.0.1

Example web browser URL for IPv6 address

Example web browser URL for IPv4 address

During connection, you will see the Altera® splash screen, after which you will be presented with the Web GUI:

Example Camera Solution GUI

Alternate RBF Download¶

There are several methods to get your .rbf onto the target board. You may want to use this method when developing your own design but do not require the microSD Card to be rebuilt:

Copy your .rbf into the boot partition of the microSD Card:
- Power down the board and remove the microSD Card.
- Rename your agilex5_modkit_vvpisp.hps_first.core.rbf to top.core.rbf.
- Connect the microSD Card to your Host and copy your top.core.rbf into the boot partition of the microSD Card.
- Safely disconnect the microSD Card from your Host.
- Insert the microSD Card back into the SOM on the board and Power the board up. Your new .rbf will get loaded by the bootloader.
ssh or scp your .rbf to the board:
- Power up the board and wait until it fully boots.
- Using a Linux terminal (or Windows equivalent like PowerShell) on your Host (and using a board IP address of 192.168.0.1 as an example):
```
scp agilex5_modkit_vvpisp.hps_first.core.rbf root@192.168.0.1:/mnt/boot/top.core.rbf
```
- Using the board serial terminal connection, login to the board and sync any pending file writes:
```
root
sync
```
- Power cycle the board. Your new .rbf will get loaded by the bootloader.

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Last update: December 10, 2025
Created: October 6, 2025