Example Designs¶
The table below provides a comprehensive list of example designs for Altera's FPGA families. You can filter the table by applying search criteria in the entry boxes above the table. Use the "Clear" button on the right to clear your search criteria. Some suggested search options are:
- Supported Devices: Agilex 5, Agilex7, Stratix 10, Arria 10 and Cyclone V.
- Category: Nios V, PCIe, Memory, HPS, Networking, TSN, 1588PTP, Robotics, Video/Vision, AI, Transceiver
- Design Type: Both System Example Designs and Tutorial Example Designs are provided in this site.
- System Example Designs contain multiple IPs in a broadly applicable design including software and drivers.
- Tutorial Example Designs teach how to use a feature, function or device capability with a simple example.
- Development Kit Target: Search by Device name to narrow down the development targets.
- Quartus Version: Enter "Pro" or "Std" and then your Quartus version number.
- Description: You can review the description to identify if the Example Design meets your needs.
- Documentation: This link takes you to the appropriate documentation so you can get started with your design.
You can use the filter fields to narrow your search.
| Example Design | Supported Device(s) | Category | Design Type | Development Kit Target | Quartus Version | Description | Documentation |
|---|---|---|---|---|---|---|---|
| Agilex 7 PCIe-Attached Example Design with OFS (I-Series) | Agilex 7 | AI | System Example Design | * Agilex 7 FPGA I-Series Development Kit 2xR-Tile and 1xF-Tile DK-DEV-AGI027-RA | Pro 25.1 | Demonstrates ML inference using the Agilex 7 FPGA I-Series Development Kit (2x R-Tile and 1x F-Tile). | Agilex 7 PCIe-Attached Example Design with OFS (I-Series, 2x R-Tile and 1x F-Tile) |
| Agilex 7 PCIe-Attached Example Design with OFS | Agilex 7 | AI | System Example Design | * Intel FPGA SmartNIC N6001-PL Platform | Pro 25.1 | Demonstrates ML inference using the Intel FPGA SmartNIC N6001-PL Platform (without an Ethernet controller). | Agilex 7 PCIe-Attached Example Design with OFS (N6001) |
| Agilex 7 PCIe-Attached Example Design | Agilex 7 | AI | System Example Design | * Terasic* DE10-Agilex Development Board | Pro 25.1 | Demonstrates ML inference using the Terasic DE10-Agilex Development Board. | Agilex 7 PCIe-Attached Example Design (DE10) |
| Agilex 5 Hostless JTAG Example Design | Agilex 5 | AI | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Demonstrate inference over JTAG and target FPGA AI Suite IP on the Agilex 5E Modular Development Kit. | Hostless JTAG Example Design |
| Debugging Linux with Arm Development Studio | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates how to use Arm Development Studio to debug the Linux kernel. | Debugging Linux with Arm Development Studio |
| Debugging U-Boot with Arm Development Studio | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates how to use Arm Development Studio to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Arm Development Studio |
| Debugging Linux with Ashling RiscFree | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates how to use Ashling RiscFree to debug the Linux kernel. | Debugging Linux with Ashling RiscFree |
| Debugging U-Boot with Ashling RiscFree | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates how to use Ashling RiscFree to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Ashling RiscFree |
| Baremetal Hello World Example | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Provides instructions on how to build an HPS baremetal Hello World application to boot from QSPI and DDRAM. | Baremetal Hello World Example |
| HPS Linux Golden System Reference Design | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit (4x F-Tile) | Pro 25.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS Linux Golden System Reference Design | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Development Kit (2x F-Tile) | Pro 25.1 | Demonstrates how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| Nios V/g TinyML LiteRT | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex® 7 FPGA F-Series Development Kit, ordering code DK-DEV-AGF014EA | Pro 25.1 | Demonstrates the TinyML application using LiteRT for microcontrollers software with Nios V/g processor | Nios® V/g TinyML LiteRT for Microcontroller Design |
| Setting up and Using Bridges HPS Linux Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Demonstrates how to configure FPGA2HPS bridges to move data to/from SDRAM from Linux | Setting up and Using Bridges HPS Linux Example |
| HPS Golden Hardware Reference Design (GHRD) Boot Examples | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| SoC FPGA Remote Debug Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Demonstrates how to use the remote FPGA debug through HPS feature including instructions to build binaries for this | SoC FPGA Remote Debug Example |
| Nios V/g Processor Floating Point Unit | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile), ordering code DK-SI-AGF014EB | Pro 25.1 | Applying Linpack benchmark on Nios V/g floating point unit | Nios® V/g Processor Floating Point Unit (FPU) Design |
| HPS eMMC Boot Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 24.3.1 | Demonstrates how to boot HPS from eMMC | HPS eMMC Boot Example |
| HPS Linux Golden System Reference Design | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Demonstrates how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS Xen Hypervisor GSRD | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Demonstrates the use of HPS Xen Hypervisor including the build of binaries to exercise this. | HPS Xen Hypervisor GSRD |
| SoC Fabric Configuration from Linux Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Development Kit (2x F-Tile) | Pro 25.1 | Demonstrates how to configure the FPGA fabric from Linux running on HPS | SoC Fabric Configuration from Linux Example |
| HPS Multi-QSPI Remote System Update Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Provides a complete Multi-QSPI Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Multi-QSPI Remote System Update Example |
| HPS Remote System Update Example | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Pro 25.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example |
| HPS Linux Golden System Reference Design | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile) | Pro 25.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS GHRD Linux Boot Examples | Cyclone® V | Building Bootloader Instruction Page | System Example Design | * Cyclone® V E FPGA Development Kit | Std 25.1 | Complete bootloader building instruction with GHRD, Arm Trusted Firmware, U-Boot, Linux Kernel, drivers, and sample applications for Cyclone® V E FPGA Development Kit. Supports multiple boot sources, including SD card and QSPI. | HPS GHRD Linux Boot Examples |
| HPS Simics Zephyr Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 E-Series Universal Virtual Platform | Pro 24.3 | Demonstrate how to exercise several use cases in which HPS software is running on the Simics simulator using virtual platforms | Simics Zephyr GSRD |
| HPS Simics Linux Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 E-Series Universal Virtual Platform | Pro 25.1 | Demonstrate how to exercise several use cases in which HPS software is running on the Simics simulator using virtual platforms | Simics Linux GSRD |
| HPS Linux Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Modular Development Kit | Pro 25.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| ROS Consolidated Robot Controller Example Design for Agilex™ 5 Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | ROS 2 based robot controller example with Drive-on-Chip motor control integration. | ROS Consolidated Robot Controller Example Design for Agilex™ 5 Devices |
| Drive-On-Chip with PLC Design Example for Agilex™ 5 Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Drive-On Chip with PLC User Guide for Modular Development kit. | Drive-On-Chip with PLC Design Example for Agilex™ 5 Devices |
| Drive-On-Chip with Functional Safety Design Example for Agilex™ 5 Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Drive-On Chip with FUSA User Guide for Modular Development kit. | Drive-On-Chip with Functional Safety Design Example for Agilex™ 5 Devices |
| HPS Golden Hardware Reference Design (GHRD) Boot Examples | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Modular Development Kit | Pro 25.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| HPS Xen Hypervisor GSRD | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Modular Development Kit | Pro 25.1 | Demonstrates the use of HPS Xen Hypervisor including the build of binaries to exercise this. | HPS Xen Hypervisor GSRD |
| HPS Linux Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| Nios V/c Helloworld OCM Memory Test | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.1 | Prints a simple Hello World message and performs a simple OCM memory test | Helloworld and OCM memory test design on Nios® V/c Processor |
| Nios V/m Baseline Golden Hardware Reference Design | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.1 | Demonstrates the baseline GHRD for a Nios V/m processor with basic bare minimum peripherals | Nios® V/m Processor Baseline GHRD Design |
| Nios® V/g TinyML LiteRT | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.1 | Demonstrates the TinyML application using LiteRT for microcontrollers software with Nios® V/g processor | Nios® V/g TinyML LiteRT for Microcontroller Design |
| HPS Golden Hardware Reference Design (GHRD) Boot Examples | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| HPS Zephyr Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 24.3 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS Zephyr GSRD User Guide |
| HPS Xen Hypervisor GSRD | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates the use of HPS Xen Hypervisor including the build of binaries to exercise this. | HPS Xen Hypervisor GSRD |
| Agilex™ 5E HPS Enhanced System Example Design Overview | Agilex 5 | HPS | System Example Design | * DK-A5E065BB32AES1 | Pro 25.1 | Ethernet and Memory (DDR4,LPDDR4) Interface added on top of base GSRD and verified the HPS to Ethernet and Memory data path using HE_HSSI and MEM_TG respectively. | Enhanced HPS User Guide |
| Agilex 5 PCIe Root Port System Example Design | Agilex 5 | PCIe | System Example Design | * Agilex™ 5 E-Series Premium Development Kit | Pro 25.1 | Demonstrates a PCIe root port running on Agilex 5 E-Series Premium Development Kit | PCIe Root Port |
| SoC FPGA Remote Debug Example | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates how to use the remote FPGA debug through HPS feature including instructions to build binaries for this | SoC FPGA Remote Debug Example |
| HPS Remote System Update Example | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example |
| HPS eMMC Boot Example | Stratix 10 | HPS | Tutorial Example Design | * Stratix® 10 SX SoC Development Kit | Pro 24.3.1 | Demonstrates how to boot HPS from eMMC | HPS eMMC Boot Example |
| SoC Fabric Configuration from Linux Example | Stratix 10 | HPS | Tutorial Example Design | * Stratix® 10 SX SoC Development Kit | Pro 25.1 | Demonstrates how to configure the FPGA fabric from Linux running on HPS | SoC Fabric Configuration from Linux Example |
| HPS Linux Golden System Reference Design | Stratix 10 | HPS | System Example Design | * Stratix® 10 SX SoC Development Kit | Pro 25.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS Remote System Update Example | Stratix 10 | HPS | Tutorial Example Design | * Stratix® 10 SX SoC Development Kit | Pro 25.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example |
| HPS Golden Hardware Reference Design (GHRD) Boot Examples | Stratix 10 | HPS | Tutorial Example Design | * Stratix® 10 SX SoC Development Kit | Pro 25.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| SoC FPGA Remote Debug Example | Stratix 10 | HPS | Tutorial Example Design | * Stratix® 10 SX SoC Development Kit | Pro 25.1 | Demonstrates how to use the remote FPGA debug through HPS feature including instructions to build binaries for this | SoC FPGA Remote Debug Example |
Last update:
July 24, 2025
Created: August 7, 2024
Created: August 7, 2024