Example Designs¶
The table below provides a comprehensive list of example designs for Altera's FPGA families. You can filter the table by applying search criteria in the entry boxes above the table. Use the "Clear" button on the right to clear your search criteria. Some suggested search options are:
- Supported Devices: Agilex™ 3, Agilex™ 5, Agilex™ 7, Stratix® 10, Arria® 10 and Cyclone® V.
- Category: Nios V, PCIe, Memory, HPS, Networking, TSN, 1588PTP, Robotics, Video/Vision, AI, Transceiver
- Design Type: Both System Example Designs and Tutorial Example Designs are provided in this site.
- System Example Designs contain multiple IPs in a broadly applicable design including software and drivers.
- Tutorial Example Designs teach how to use a feature, function or device capability with a simple example.
- Development Kit Target: Search by Device name to narrow down the development targets.
- Quartus Version: Enter "Pro" or "Std" and then your Quartus version number.
- Description: You can review the description to identify if the Example Design meets your needs.
- Documentation: This link takes you to the appropriate documentation so you can get started with your design.
You can use the filter fields to narrow your search.
| Example Design | Supported Device(s) | Category | Design Type | Development Kit Target | Quartus Version | Description | Documentation |
|---|---|---|---|---|---|---|---|
| Embedded Linux Real-Time Tuning using Kas/Yocto | Agilex 5 | HPS | Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit (Production) | Pro 26.1 | how to build and tune a deterministic, low-latency Embedded Linux system using Yocto Project and KAS for Altera® SoC platforms. | Embedded Linux RT Tuning (KAS/Yocto) |
| Debugging Linux with Ashling RiscFree | Agilex 3 | HPS | Tutorial Example Design | * Agilex™ 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrates how to use Ashling RiscFree to debug the Linux kernel. | Debugging Linux with Ashling RiscFree |
| Debugging U-Boot with Arm Development Studio | Agilex 3 | HPS | Tutorial Example Design | * Agilex™ 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrates how to use Arm Development Studio to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Arm Development Studio |
| Debugging U-Boot with Ashling RiscFree | Agilex 3 | HPS | Tutorial Example Design | * Agilex™ 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrates how to use Ashling RiscFree to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Ashling RiscFree |
| Debugging Linux with Arm Development Studio | Agilex 3 | HPS | Tutorial Example Design | * Agilex™ 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrates how to use Arm Development Studio to debug the Linux kernel. | Debugging Linux with Arm Development Studio |
| Debugging Linux with Arm Development Studio | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrates how to use Arm Development Studio to debug the Linux kernel. | Debugging Linux with Arm Development Studio |
| Debugging Linux with Ashling RiscFree | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrates how to use Ashling RiscFree to debug the Linux kernel. | Debugging Linux with Ashling RiscFree |
| Debugging U-Boot with Arm Development Studio | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrates how to use Arm Development Studio to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Arm Development Studio |
| Debugging U-Boot with Ashling RiscFree | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrates how to use Ashling RiscFree to debug U-Boot SPL and U-Boot. | Debugging U-Boot with Ashling RiscFree |
| Baremetal Hello World Example | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Provides instructions on how to build an HPS baremetal Hello World application to boot from QSPI and DDRAM. | Baremetal Hello World Example |
| Agilex 7 PCIe-Attached Example Design with OFS (I-Series) | Agilex 7 | AI | System Example Design | * Agilex 7 FPGA I-Series Development Kit 2xR-Tile and 1xF-Tile DK-DEV-AGI027-RA | Pro 25.1 | Demonstrates ML inference using the Agilex 7 FPGA I-Series Development Kit (2x R-Tile and 1x F-Tile). | Agilex 7 PCIe-Attached Example Design with OFS (I-Series, 2x R-Tile and 1x F-Tile) |
| Agilex 7 PCIe-Attached Example Design | Agilex 7 | AI | System Example Design | * Terasic* DE10-Agilex Development Board | Pro 25.1 | Demonstrates ML inference using the Terasic DE10-Agilex Development Board. | Agilex 7 PCIe-Attached Example Design (DE10) |
| Agilex 7 PCIe-Attached Example Design with OFS | Agilex 7 | AI | System Example Design | * Altera® FPGA SmartNIC N6001-PL Platform | Pro 25.1 | Demonstrates ML inference using the Altera® FPGA SmartNIC N6001-PL Platform (without an Ethernet controller). | Agilex 7 PCIe-Attached Example Design with OFS (N6001) |
| Agilex 5 Hostless JTAG Example Design | Agilex 5 | AI | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Demonstrate inference over JTAG and target FPGA AI Suite IP on the Agilex 5E Modular Development Kit. | Hostless JTAG Example Design |
| Using the OpenVINO Open Model Zoo | Agilex 7, Agilex 5 | AI | Tutorial Example Design | N/A | Pro 25.1 | Enable users in using the OpenVINO model zoo for testing inference. | Using the OpenVINO Open Model Zoo |
| AGX5 Modular Development Kit Setup with OFS 2025.1 | Agilex 5 | AI | Tutorial Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Enable users in using an Agilex 5 Modular Development Kit with the OFS 2025.1 release. | AGX5 Modular Development Kit Setup with OFS 2025.1 |
| HPS GSRD User Guide for the Arria® 10 SX SoC Development Kit | Arria 10 | HPS | Tutorial Example Design | * Arria 10 SX SoC Development Kit | Pro 26.1 | Complete reference design with GHRD, U-Boot, Linux Kernel, drivers, and sample applications for Arria® 10 SX SoC Development Kit. Supports multiple boot sources, including SD card, QSPI, NAND. | GSRD User Guide |
| Arria 10 HPS Golden Hardware Reference Design (GHRD) Boot Examples | Arria 10 | HPS | Tutorial Example Design | * Arria 10 SX SoC Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| 4Kp30 Multi-Sensor Camera with AI Inference Solution System Example Design for Agilex™ 5 Devices | Agilex 5 | Video/Vision | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | 4Kp30 Multi-Sensor Camera with AI Inference Solution System Example Design User Guide for Modular Development kit. | 4Kp30 Multi-Sensor Camera with AI Inference Solution System Example Design for Agilex™ 5 Devices |
| 4Kp60 Multi-Sensor HDR Camera Solution System Example Design for Agilex™ 5 Devices | Agilex 5 | Video/Vision | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | 4Kp60 Multi-Sensor HDR Camera Solution System Example Design User Guide for Modular Development kit. | 4Kp60 Multi-Sensor HDR Camera Solution System Example Design for Agilex™ 5 Devices |
| HPS Linux Golden System Reference Design | Agilex 5 | HPS | Tutorial Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS GHRD Linux Boot Examples | Agilex 5 | HPS | Tutorial Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| HPS Xen System Example Design User Guide: Agilex 5 FPGA E-Series 065B Modular Development Kit (ES) | Agilex 5 | HPS | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit | Pro 26.1 | Demonstrates the use of HPS Xen Hypervisor including building binaries | HPS Xen Hypervisor GSRD |
| HPS Time Sensitive Network SGMII XCVR 3x2.5G System Example Design User Guide | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Modular Development Kit | Pro 25.1.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS TSN SGMII XCVR System 3x2.5G Example Design User Guide |
| Agilex™ 5 1x10G Ethernet System Example Design. | Agilex 5 | Networking | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit | Pro 25.3 | Demonstrates a Single Port 10G Ethernet running on Agilex 5 E-Series Modular Development Kit | 1x10G Ethernet System Example Design |
| Holoscan Sensor Bridge MIPI to 10GbE System Example Design for Agilex™ 5 Devices | Agilex 5 | Video/Vision | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit MK-A5E065BB32AES1 | Pro 25.1 | Holoscan Sensor Bridge MIPI to 10GbE System Example Design User Guide for Modular Development kit. | Holoscan Sensor Bridge MIPI to 10GbE System Example Design for Agilex™ 5 Devices |
| ROS Consolidated Robot Controller Example Design for Agilex™ 5 Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit (Production) | Pro 26.1 | ROS 2 based robot controller example with Drive-on-Chip motor control integration. | ROS Consolidated Robot Controller Example Design for Agilex™ 5 Devices |
| Drive-On-Chip with PLC Design Example for Agilex™ Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit (Production) | Pro 26.1 | Drive-On Chip with PLC User Guide for Modular Development kit. | Drive-On-Chip with PLC Design Example for Agilex™ Devices |
| Drive-On-Chip with Functional Safety Design Example for Agilex™ 5 Devices | Agilex 5 | Robotics | System Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit (Production) | Pro 26.1 | Drive-On Chip with FUSA User Guide for Modular Development kit. | Drive-On-Chip with Functional Safety Design Example for Agilex™ 5 Devices |
| HPS Linux Boot Tutorial Example Design User Guide: Agilex™ 5 FPGA E-Series 065A Premium Development Kit | Agilex 5 | HPS | Tutorial Example Design | * DK-A5E065BB32AEA | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS Linux Boot System Example Design |
| HPS Baseline System Example Design User Guide: Agilex 5 FPGA E-Series 065A Premium Development Kit | Agilex 5 | HPS | System Example Design | * DK-A5E065AB32AEA | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries | HPS GSRD User Guide |
| HPS Linux Boot Tutorial Example Design User Guide: Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Agilex 5 | HPS | Tutorial Example Design | * DK-A5E065BB32AEA | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS Linux Boot System Example Design |
| HPS Open OCD Debugging Tutorial Example Design: Agilex 5 FPGA E-Series 065B Premium Development Kit | Agilex 5 | HPS | Tutorial Example Design | * DK-A5E065BB32AEA | Pro 26.1 | Tutorial on how to debug U-Boot and Linux with OpenOCD | HPS OpenOCD Debugging |
| HPS Baseline System Example Design User Guide: Agilex 5 FPGA E-Series 065B Premium Development Kit | Agilex 5 | HPS | System Example Design | * DK-A5E065BB32AEA | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries | HPS GSRD User Guide |
| HPS Remote System Update Tutorial Example Design User Guide: Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Agilex 5 | HPS | Tutorial Example Design | * DK-A5E065BB32AEA | Pro 26.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example Design |
| HPS GHRD Linux Boot Examples | Agilex 5 | HPS | Tutorial Example Design | * Agilex 5 FPGA E-Series 013B Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components. | HPS GHRD Linux Boot Examples |
| HPS Golden System Reference Design User Guide | Agilex 5 | HPS | Tutorial Example Design | * Agilex 5 FPGA E-Series 013B Development Kit | Pro 26.1 | Complete reference design with GHRD, Arm Trusted Firmware, U-Boot, Linux Kernel, drivers, and sample applications for Agilex 5 013B Development Kit. Supports multiple boot sources, including SD card and QSPI. | HPS GSRD User Guide |
| HPS Linux Golden System Reference Design | Agilex 5 | HPS | Tutorial Example Design | * Agilex 5 FPGA E-Series 065B Modular Development Kit (Production) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS Zephyr Golden System Reference Design | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 24.3 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS Zephyr GSRD User Guide |
| Nios V/m Baseline Golden Hardware Reference Design | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.1.1 | Demonstrates the baseline GHRD for a Nios V/m processor with basic bare minimum peripherals | Nios® V/m Processor Baseline GHRD Design |
| Nios® V/m Soft-SoC System Example Design | Agilex 5 | NIOS V | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.3.1 | Demonstrates a soft SoC design using Nios V/m processor with common soft embedded peripherals IP. | Nios® V/m Full Feature Golden Hardware Reference Design |
| Nios® V/g Processor Ping Application | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.3 | Demonstrates a ping application on a Nios® V/g processor using the Triple Speed Ethernet IP | Nios® V/g Processor Ping Application |
| Nios® V/g TinyML System Example Design | Agilex 5 | AI | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.3.1 | Demonstrates the TinyML application using LiteRT for microcontrollers software with Nios® V/g processor | Nios® V/g TinyML LiteRT for Microcontroller Design |
| Nios V/c Helloworld OCM Memory Test | Agilex 5 | NIOS V | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit, ordering code DK-A5E065BB32AES1 | Pro 25.3 | Prints a simple Hello World message and performs a simple On-Chip Memory test | Helloworld and OCM memory test design on Nios® V/c Processor |
| Agilex™ 5 Precision Time Protocol System Example Design | Agilex 5 | 1588PTP | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.3 | This System Example Design includes the required hardware, drivers, and user applications to validate a complete Precision Time Protocol (PTP) stack between two Agilex™ 5 Premium development kits | 2x10GbE PTP1588 System Example Design |
| HPS Xen System Example Design User Guide: Agilex 5 FPGA E-Series 065B Premium Development Kit (ES) | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrates the use of HPS Xen Hypervisor including building binaries | HPS Xen Hypervisor GSRD |
| Agilex 5 PCIe Root Port System Example Design | Agilex 5 | PCIe | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 25.1 | Demonstrates a PCIe root port running on Agilex 5 E-Series Premium Development Kit | PCIe Root Port |
| HPS Linux Boot Tutorial Example Design User Guide: Agilex™ 5 FPGA E-Series 065B Premium Development Kit ES | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS Linux Boot System Example Design |
| Agilex™ 5E HPS Enhanced System Example Design Overview | Agilex 5 | HPS | System Example Design | * DK-A5E065BB32AES1 | Pro 25.1 | Ethernet and Memory (DDR4,LPDDR4) Interface added on top of base GSRD and verified the HPS to Ethernet and Memory data path using HE_HSSI and MEM_TG respectively. | Enhanced HPS User Guide |
| HPS TSN RGMII System Example Design User Guide | Agilex 5 | HPS | System Example Design | * Agilex™ 5 E-Series Premium Development Kit | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS TSN RGMII System Example Design User Guide |
| HPS TSN SGMII XCVR System Example Design User Guide | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 24.3 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS TSN SGMII XCVR System Example Design User Guide |
| HPS TSN RGMII HVIO System Example Design User Guide | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 24.3.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS TSN RGMII HVIO System Example Design User Guide |
| FPGA Remote Debug Tutorial Example Design User Guide: Agilex 5 FPGA E-Series 065B Premium Development Kit (ES) | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrate remote FPGA debug over Ethernet | SoC FPGA Remote Debug |
| HPS Remote System Update Tutorial Example Design User Guide: Agilex™ 5 FPGA E-Series 065B Premium Development Kit ES | Agilex 5 | HPS | Tutorial Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example Design |
| HPS Baseline System Example Design User Guide: Agilex 5 FPGA E-Series 065B Premium Development Kit (ES) | Agilex 5 | HPS | System Example Design | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries | HPS GSRD User Guide |
| Agilex 5 USB 3.1 Gen-1 Controller Device Mode and Dual Role Device Mode | Agilex 5 | HPS | Tutorial Example Design User Guide | * Agilex™ 5 FPGA E-Series 065B Premium Development Kit | Pro 26.1 | Provides instructions on how to enable the USB 3.1 Gen-1 Controller in Host Mode, Device Mode, and Dual Role Device (DRD) Mode. | USB 3.1 Example |
| HPS Linux Golden System Reference Design | Agilex 5 | HPS | Tutorial Example Design | * MK-A5E065AB32AEA | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | HPS GSRD User Guide |
| HPS Simics Zephyr Tutorial Example Design User Guide: Agilex™ 5 Virtual Platform | Agilex 5 | HPS | Tutorial Example Design | N/A | Pro 24.3 | Demonstrate how to exercise several use cases in which HPS software is running on the Simics simulator using virtual platforms. | Simics Zephyr HPS Baseline System Example Design |
| HPS Simics Linux Baseline Tutorial Example Design User Guide: Agilex™ 5 Virtual Platform | Agilex 5 | HPS | Tutorial Example Design | N/A | Pro 26.1 | Demonstrate how to exercise several use cases in which HPS software is running on the Simics simulator using virtual platforms. | Simics Linux HPS Baseline System Example Design |
| HPS Baseline System Example Design User Guide: Agilex™ 7 FPGA F-Series Development Kit (2x F-Tile) | Agilex 7 | HPS | System Example Design | * Agilex 7 FPGA F-Series Development Kit (2x F-Tile) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS GSRD User Guide |
| Nios® V/g Lockstep System Example Design | Agilex 7 | NIOS V | System Example Design | * Agilex® 7 FPGA F-Series Development Kit | Pro 25.3.1 | Demonstrates the Nios V/g Lockstep processor based on Use Case 1 with Reset Scenario 1, with another Nios V/m processor as System Supervisor. | Nios V/g Lockstep Design |
| Nios® V/g TinyML System Example Design | Agilex 7 | NIOS V | System Example Design | * Agilex® 7 FPGA F-Series Development Kit | Pro 25.3.1 | Demonstrates the TinyML application using LiteRT for microcontrollers software with Nios V/g processor | Nios® V/g TinyML LiteRT for Microcontroller Design |
| Nios V/g CRC Custom Instruction | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex® 7 FPGA F-Series Development Kit, ordering code DK-DEV-AGF014EA | Pro 25.1.1 | Demonstrates the custom instruction feature for CRC calculation RTL block with Nios V/g processor | Nios V/g CRC Custom Instruction |
| Nios V/g Basic Custom Instruction | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex® 7 FPGA F-Series Development Kit, ordering code DK-DEV-AGF014EA | Pro 25.1.1 | Demonstrates the custom instruction feature on custom bit manipulation with Nios V/g processor | Nios V/g Basic Custom Instruction |
| Nios V/g ECC Feature | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex® 7 FPGA F-Series Development Kit, ordering code DK-DEV-AGF014EA | Pro 25.1.1 | Demonstrates the ECC capabilities of the Nios V/g processor via simulation. | Nios V/g ECC Feature |
| HPS Baseline System Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS GSRD User Guide |
| HPS Bridges Linux Tutorial Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Demonstrates how to configure FPGA2HPS bridges to move data to/from SDRAM from Linux | Setting up and Using Bridges HPS Linux Example |
| Nios® V/m Processor IPerf Server Application | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile), ordering code DK-SI-AGF014EB | Pro 25.1.1 | Demonstrates a IPerf application on a Nios® V/m processor using the Triple Speed Ethernet IP | Nios® V/m Processor IPerf Server Application |
| Nios V/g Processor Tightly Coupled Memory | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile), ordering code DK-SI-AGF014EB | Pro 25.1.1 | Demonstrate memory access speed between tightly coupled memory, on-chip memory (cached & un-cached), and external memory interface (cached & un-cached). | Nios® V/g Processor Tightly Coupled Memory |
| Nios V/g Processor Floating Point Unit | Agilex 7 | NIOS V | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile), ordering code DK-SI-AGF014EB | Pro 25.1.1 | Applying Linpack benchmark on Nios V/g floating point unit | Nios® V/g Processor Floating Point Unit (FPU) Design |
| HPS eMMC Boot Tutorial Example Design:Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS eMMC Boot |
| Xen System Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | System Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Demonstrates the use of HPS Xen Hypervisor including building binaries | HPS Xen Hypervisor GSRD |
| HPS Linux Boot Tutorial Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS Linux Boot System Example Design |
| FPGA Fabric Configuration from Linux Tutorial Example Design: : Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Shows how to configure FPGA fabric from Linux | SoC Fabric Configuration from Linux Example |
| HPS Remote System Update Tutorial Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example Design |
| HPS Multi-QSPI Remote System Update Tutorial Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Provides a complete Multi-QSPI Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Multi-QSPI Remote System Update Example Design |
| FPGA Remote Debug Tutorial Example Design User Guide: Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tile and E-Tile) | Pro 26.1 | Demonstrate remote FPGA debug over Ethernet | SoC FPGA Remote Debug |
| Agilex 7 R-Tile AVST PCIe Configuration Intercept Interface (CII) example design | Agilex 7 | PCIe | System Example Design | * Agilex™ 7 FPGA I-Series Development Kit (2x R-Tile and 1x F-Tile) | Pro 26.1 | Intended for FPGA and system developers to use as a guide for evaluating the R-Tile AVST PCIe IP and CII interface on Agilex 7 I-Series FPGA Development Kit board | CII Example Design |
| HPS Baseline System Example Design User Guide: Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit (4x F-Tile) | Agilex 7 | HPS | System Example Design | * Agilex 7 FPGA I-Series Transceiver-SoC Development Kit (4x F-Tile) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS GSRD User Guide |
| Precision Time Protocol System Example Design | Agilex 7 | 1588PTP | System Example Design | * Agilex 7 FPGA I-Series Transceiver-SoC Development Kit (4x F-Tile) | Pro 26.1 | This System Example Design includes the required hardware, drivers, and user applications to validate a complete Precision Time Protocol (PTP) stack between two Agilex 7 development kits. | Time Precision Protocol System Example Design (I-Series, 4x F-Tile) |
| HPS Baseline System Example Design User Guide: Agilex™ 7 FPGA M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile) | Agilex 7 | HPS | System Example Design | * Agilex 7 FPGA M-Series Development Kit HBM2e Edition (3x F-Tile and 1x R-Tile) | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS GSRD User Guide |
| Cyclone® V and Arria® V SoC QSPI Boot | Cyclone V | HPS | Tutorial Example Design | * Cyclone V E FPGA Development Kit | Standard 24.1 | Demonstrates the problem with QSPI Flash part in default 3-byte addressing mode on Cyclone® V and Arria® V SoC QSPI Boot, and the recommended workarounds. | Cyclone® V and Arria® V SoC QSPI Boot |
| HPS GHRD Linux Boot Examples | Cyclone® V | HPS | System Example Design | * Cyclone® V E FPGA Development Kit | Std 25.1 | Complete bootloader building instruction with GHRD, Arm Trusted Firmware, U-Boot, Linux Kernel, drivers, and sample applications for Cyclone® V E FPGA Development Kit. Supports multiple boot sources, including SD card and QSPI. | HPS GHRD Linux Boot Examples |
| HPS Linux Golden System Reference Design | Cyclone V | HPS | System Example Design | * Cyclone V E FPGA Development Kit | Standard 24.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the GHRD and HPS binaries | GSRD User Guide |
| HPS Linux Boot Tutorial Example Design User Guide: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Stratix 10 | HPS | Tutorial Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS Linux Boot System Example Design |
| HPS Baseline System Example Design User Guide: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Stratix 10 | HPS | System Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Demonstrate how to exercise a set of basic HPS examples in the development kit. Also provides instructions on how to build the hardware design and HPS software binaries. | HPS GSRD User Guide |
| HPS Remote System Update Tutorial Example Design User Guide: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Stratix 10 | HPS | Tutorial Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Provides a complete Remote System Update example including build instruction and execution for U-Boot and Linux | HPS Remote System Update Example Design |
| HPS eMMC Boot Tutorial Example Design: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Agilex 7 | HPS | Tutorial Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Demonstrate how to boot from eMMC on the development kit | HPS eMMC Boot |
| FPGA Fabric Configuration from Linux Tutorial Example Design: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Stratix 10 | HPS | Tutorial Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Shows how to configure FPGA fabric from Linux | SoC Fabric Configuration from Linux |
| FPGA Remote Debug Tutorial Example Design User Guide: Stratix® 10 SX SoC FPGA Development Kit (H-Tile) | Stratix 10 | HPS | Tutorial Example Design | * Stratix 10 SX SoC Development Kit | Pro 26.1 | Demonstrate remote FPGA debug over Ethernet | SoC FPGA Remote Debug |
| HPS Simics Linux Baseline Tutorial Example Design User Guide: Agilex™ 3 Virtual Platform. | Agilex 3 | HPS | Tutorial Example Design | N/A | Pro 26.1 | Demonstrate how to exercise several use cases in which HPS software is running on the Simics simulator using virtual platforms | Simics Linux HPS Baseline System Example Design |
| HPS GHRD Linux Boot Examples | Agilex 3 | HPS | Tutorial Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Provides instructions on how to build Linux systems from separate HPS software components | HPS GHRD Linux Boot Examples |
| HPS Open OCD Debugging Tutorial Example Design: Agilex 3 FPGA and SoC C-Series Development Kit | Agilex 3 | HPS | Tutorial Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Tutorial on how to debug U-Boot and Linux with OpenOCD | HPS OpenOCD Debugging |
| HPS Golden System Reference Design User Guide | Agilex 3 | HPS | Tutorial Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Complete reference design with GHRD, Arm Trusted Firmware, U-Boot, Linux Kernel, drivers, and sample applications for Agilex 5 Premium Development Kit. Supports multiple boot sources, including SD card and QSPI. | HPS GSRD User Guide |
| HPS Remote System Update Tutorial Example Design User Guide: Agilex™ 3 FPGA and SoC C-Series Development Kit | Agilex 3 | HPS | Tutorial Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Provides a complete Remote System Update example including build instruction and execution for ATF, U-Boot and Linux | HPS Remote System Update Example Design |
| FPGA Remote Debug Tutorial Example Design User Guide: Agilex™ 3 FPGA and SoC C-Series Development Kit | Agilex 3 | HPS | Tutorial Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrate remote FPGA debug over Ethernet | SoC FPGA Remote Debug |
| Xen System Example Design User Guide: Agilex™ 3 FPGA and SoC C-Series Development Kit | Agilex 3 | HPS | System Example Design | * Agilex 3 FPGA and SoC C-Series Development Kit | Pro 26.1 | Demonstrates the use of HPS Xen Hypervisor including building binaries | HPS Xen Hypervisor GSRD |
| 4Kp30 Camera Lite Solution System Example Design for Agilex™ 3 Devices | Agilex 3 | Video/Vision | System Example Design | * Agilex™ 3 FPGA and SoC C-Series Development Kit* Agilex™ 3 FPGA C-Series Development Kit | Pro 25.3 | 4Kp30 Camera Lite Solution System Example Design User Guide for Agilex™ 3 Development kit. | 4Kp30 Camera Lite Solution System Example Design for Agilex™ 3 Devices |
Last update:
April 30, 2026
Created: August 7, 2024
Created: August 7, 2024